Ground Up: Memory
Welcome to a series of posts cleverly titled Ground Up, where I explain computing concepts from the ground up! We’ll explore how computers work starting with transistors and going from there. This post specifically covers how to create memory from gates.
- Part 1: Bits
- Part 2: Gates
- Part 3: Memory
- Part 4: State Machines
Memory
Memory is a way for a system to persist state. So far, everything we have built has been purely functional and independent of state. In terms of circuits, we want to build something whose output is a function of the inputs and output. One way to achieve this is quite literally to use the output of the circuit as one of the inputs.
SR-Latch
We are going to design a circuit called SR-Latch which can set and reset its state. It will have two inputs: (S and R) and one output (Q). Also remember we will use the output as an input as well, so the third input is Q too. When creating the transition table, we will denote the new output as Q’.
| S | R | Q | Q’ |
|---|---|---|---|
0 |
0 |
0 |
0 |
0 |
0 |
1 |
1 |
0 |
1 |
X |
0 |
1 |
0 |
X |
1 |
Note: X indicates “do not care”
You’ll notice that we did not define what would happen if both S
and R are 1 because there is no logical result. Let’s call this
situation undefined behavior.
Taking a step back and thinking about what we are trying to achieve, it seems like the properties of an OR gate will be useful. In fact, we will use NOR gates.
\[Q' = \overline{(R + \overline{(S + Q)})}\]Instructions: toggle the inputs to see how the circuit reacts.
| Q | Q' | ||
|---|---|---|---|
0 | 0 | X | Q |
0 | 1 | X | 0 |
1 | 0 | X | 1 |
1 | 1 | X | ? |
This circuit is a transparent latch, which means changes in the input are immediately reflected in the output. One way to add more control is to add a gate which will prevent any changes to the circuit until it is enabled by a signal.
Gated SR-Latch
This circuit simply uses AND gates to allow the S or R signal through to the rest of the circuit.
| Q | Q' | |||
|---|---|---|---|---|
0 | X | X | X | Q |
1 | 0 | 0 | X | Q |
1 | 0 | 1 | X | 0 |
1 | 1 | 0 | X | 1 |
1 | 1 | 1 | X | ? |
Note: a common variant of this latch is a D-Latch in which a single
data bit is saved when the gate is enabled. This is easily achieved
by wiring R to not S, so the latch is reset when the data is 0
and set when it is 1.
Flip Flops
Flip flops are edge-triggered memory units usually built with two underlying gated latches. They are useful for precisely synchronizing changes to a clock signal.
| Q | ||
|---|---|---|
0 | X | Q |
0 | X | Q |
1->0 | 0 | 0 |
1->0 | 1 | 1 |
Note: the above uses two D-Latches, where the value of D gets saved
when E is 1. Notice how the final output Q only gets updated on
the falling edge (1 -> 0) of the Clk signal.
Conclusion
We successfully created a way to persist state, which will be very useful in building things like registers and state machines. Note that this is volatile memory, meaning the memory is lost when power is turned off. This is just one way to create in-circuit memory, but it’s a great building block to have in our toolset.
As always if any parts were unclear, please feel free to contact me.